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| INTEGRATED CIRCUITS DATA SHEET TDA4655 Generic multi-standard decoder Preliminary specification File under Integrated Circuits, IC02 June 1993 Philips Semiconductors Preliminary specification Generic multi-standard decoder FEATURES * Low voltage (8 V) * Low power dissipation (250 mW) * Automatic standard recognition * No adjustments required * Reduced external components * Not all time constants integrated (ACC, SECAM de-emphasis). QUICK REFERENCE DATA SYMBOL Supply VP IP Ptot Inputs V11 V24 Outputs V1 colour difference output signals (peak-to-peak value) -(R-Y) output PAL and NTSC 4.43 MHz NTSC 3.58 MHz SECAM V3 -(B-Y) output PAL and NTSC 4.43 MHz NTSC 3.58 MHz SECAM Notes to quick reference data 1. Within 2 dB output voltage deviation. 2. Burstkey width for PAL 4.3 s, for NTSC 3.6 s. Burst width for PAL and NTSC 2.25 s ratio burst chrominance amplitude 1/2.2. ORDERING INFORMATION EXTENDED TYPE NUMBER TDA4655 TDA4655T Note 1. SOT234-1; 1996 November 26. 2. SOT137-1; 1996 November 26. June 1993 2 PACKAGE PINS 24 24 PIN POSITION SDIL SO MATERIAL plastic plastic independent of supply voltage; note 2 442 370 950 559 468 525 440 1050 665 557 chrominance input voltage (peak-to-peak value) note 1 sandcastle input voltage 20 - 200 - supply voltage supply current total power dissipation 7.2 VP = 8.0 V; without load 25 VP = 8.0 V; without load - 8.0 31 248 PARAMETER CONDITIONS MIN. TYP. GENERAL DESCRIPTION TDA4655 The TDA4655 is a monolithic integrated multi-standard colour decoder for PAL, SECAM and NTSC (3.58 and 4.43 MHz) with negative colour difference output signals. It is adapted to the integrated baseband delay line TDA4660/61. MAX. UNIT 8.8 37 296 V mA mW 400 13.2 mV V 624 523 1150 791 662 1460 mV mV mV mV mV mV 1200 1330 CODE SOT234 (1) SOT137A (2) Philips Semiconductors Preliminary specification Generic multi-standard decoder TDA4655 June 1993 3 Fig.1 Block diagram. Philips Semiconductors Preliminary specification Generic multi-standard decoder PINNING SYMBOL -(R-Y)o DEEM -(B-Y)o CFOB GND1 GND2 IREF VP1 VP2 CFOR CHRI CACC HUE NIDT PIDT OSC1 PLL OSC2 2FSC NO1 NO2 SECO PALO SC PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DESCRIPTION colour difference signal output -(R-Y)* for baseband delay line external capacitor for SECAM de-emphasis colour difference signal output -(B-Y)* for baseband delay line external capacitor SECAM demodulator control (B-Y) Channel ground ground external resistor for SECAM oscillator supply 8 V supply 8 V external capacitor SECAM demodulator control (R-Y) Channel chrominance signal input external capacitor for ACC control input for HUE control and service switch external capacitor for identification circuit (NTSC) external capacitor for identification circuit (PAL and SECAM) PAL crystal external loop filter NTSC crystal 2 x fSC output standard setting input/output for NTSC 4.43 standard setting input/output for NTSC 3.58 standard setting input/output for SECAM standard setting input/output for PAL sandcastle input TDA4655 Fig.2 Pin configuration. June 1993 4 Philips Semiconductors Preliminary specification Generic multi-standard decoder FUNCTIONAL DESCRIPTION The IC contains all functions required for the identification and demodulation of signals with the standards PAL, SECAM, NTSC 3.5 with 3.58 MHz colour-carrier frequency and NTSC 4.3 with 4.43 MHz colour-carrier frequency. When an unknown signal is fed into the input, the circuit has to detect the standard of the signal, and has to switch on successively the appropriate input filter, crystal (8.8 or 7.2 MHz) and demodulator and finally, after having identified the signal, it has to switch on the colour and, in event of NTSC reception, the hue control. At the outputs the two colour difference signals -(R-Y)* and -(B-Y)* are available. The identification circuit is able to discriminate between NTSC signals with colour-carrier frequencies of 3.58 MHz or 4.43 MHz. ACC-stage The chrominance signal is fed into the asymmetrical input (pin 11) of the ACC-stage (Automatic Colour Control). The input has to be AC coupled and has an input impedance of 20 k in parallel with 10 pF. To control the chrominance amplitude the modulation independent burst amplitude is measured during the burstkey pulse which is derived from the sandcastle pulse present at pin 24. The generated error current is fed into an external storage capacitor at pin 12. The integrated error voltage controls the gain of the ACC stage so that its output is independent of input signal variations. The measurement is disabled during the vertical blanking to avoid failures because of missing burst signals. Demodulation The demodulation of the colour signal requires two demodulators. One is common for PAL and NTSC signals, the other is for SECAM signals. The PAL/NTSC demodulator consists of two synchronized demodulators, one for the (B-Y) Channel and the other for the (R-Y) Channel. The required reference signals (fSC) are input from the reference oscillator. In NTSC mode the PAL switch is disabled. The SECAM demodulator consists of a PLL system. During vertical blanking the PLL oscillator is tuned to the f0 frequencies to provide a fixed black level at the demodulator output. During demodulation the control voltages are stored in the external capacitors at pins 4 and 10. The oscillator requires an external resistor at pin 7. Behind the PLL demodulator the signal is fed into the de-emphasis network which consists Reference signal generation The reference signal generation is achieved by a PLL system. The reference oscillator operates at twice the colour-carrier frequency and is locked on the burst of the chrominance signal (chr). A divider provides reference signals (fSC) with the correct phase relationship for the PAL/NTSC demodulator and the identification part. In the SECAM mode the two f0 frequencies are derived from the PAL crystal frequency by special dividers. In this mode the oscillator is not locked to the input signal. In the NTSC mode the hue control circuit is switched between ACC stage and PLL. The phase shift of the signal can be controlled by a DC voltage at pin 13. The hue control circuit is switched off during scanning. The reference frequency (2 x fSC) is available at pin 19 to drive a PAL comb filter for example. TDA4655 of two internal resistors (2.8 k and 5.6 k) and an external capacitor connected at pin 2 (220 pF). After demodulation the signal is filtered and then fed into the next stage. Blanking, colour-killer, buffers As a result of using only one demodulator in SECAM mode the demodulated signal has to be split up in the (B-Y) Channel and the (R-Y) Channel. The unwanted signals occuring every second line, (R-Y) in the (B-Y) Channel and (B-Y) and in the (R-Y) Channel, have to be blanked. This happens in the blanking stage by an artificial black level being inserted alternately every second line. To avoid disturbances during line and field flyback these parts of the colour differential signals are blanked in all modes. When no signal has been identified, the colour is switched off (signals are blanked) by the colour killer. At the end of the colour channels are low-ohmic buffers (emitter followers). The CD output signals -(B-Y)* and -(R-Y)* are available at pins 1 and 3. Identification and system control The identification part contains three identification demodulators. The first demodulates in PAL mode. It is only active during the burstkey pulse. The reference signal (fSC) has the (R-Y) phase. The second demodulator (PLL system) operates in SECAM mode and is active also during the burstkey pulse, but delayed by 2 s. The PLL demodulator discriminates the frequency difference between the unmodulated f0 frequencies of the incoming signal (chr) and the reference frequency input from the crystal oscillator. These two demodulators are followed by an H/2 switch `rectifying' the June 1993 5 Philips Semiconductors Preliminary specification Generic multi-standard decoder demodulated signal. The result is an identification signal (PIDT, pin 15) that is positive for a PAL signal in PAL mode, for a SECAM signal in SECAM mode and for a PAL signal in NTSC 4.4 mode. If PIDT is positive in SECAM mode, the scanner switches back to the PAL mode in order to prevent a PAL signal being erroneously identified as a SECAM signal (PAL priority). If then PIDT is not positive, the scanner returns to SECAM mode and remains there until PIDT is positive again. In the event of a field frequency of 60 Hz the signal can not be identified as a SECAM signal, even if PIDT is positive. In this event the scanner switches forward in the NTSC 3.5 mode. If the H/2 signal has the wrong polarity, the identification signal is negative and the H/2 flip-flop is set to the correct phase. The third demodulator operates in NTSC mode and is active during the burstkey pulse. The resulting identification signal (NIDT, pin 14) is positive for PAL and NTSC 4.4 signals in NTSC 4.4 mode and for NTSC 3.5 signals in the NTSC 3.5 mode. The reference signal has the (B-Y) phase. The two identification signals allow an unequivocal identification of the received signal. In the event of a signal being identified, the scanning is stopped and after a delay time the colour is switched on. The standard outputs (active HIGH) are available at the pins 20, 21, 22 and 23. During scanning the HIGH level is 2.5 V and when a signal has been identified the HIGH level is switched to 6 V. The standard pins can also be used as inputs in order to force the IC into a desired mode (Forced Standard Setting). TDA4655 Sandcastle detector and pulse processing In the sandcastle detector the super sandcastle pulse (SC) present at pin 24 is compared with three internal threshold levels by means of three differential amplifiers. The derived signals are the burstkey pulse, the horizontal blanking pulse and the combined horizontal and vertical blanking pulse. These signals are processed into various control pulses required for the timing of the IC. Bandgap reference In order to ensure that the CD output signals and the threshold levels of the sandcastle detector are independent of supply voltage variations a bandgap reference voltage has been integrated. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL Tstg Tamb Vp Ptot V24 PARAMETER storage temperature operating ambient temperature supply voltage power dissipation voltage at pin 24 voltage at all other pins without load Imax = 10 A Imax = 100 A CONDITIONS MIN. -25 0 - - - - MAX. +150 +70 8.8 330 15 VP + Vbe UNIT C C V mW V V THERMAL RESISTANCE SYMBOL Rth j-a PARAMETER thermal resistance on printed-circuit board from junction to ambient in free air (without heat spreader) SO 24 SDIL 24 90 K/W 70 K/W THERMAL RESISTANCE June 1993 6 Philips Semiconductors Preliminary specification Generic multi-standard decoder TDA4655 CHARACTERISTICS Measured with application circuit (Fig.4) at Tamb = +25 C, 8 V supply, 75% colour bar chrominance input signal of 200 mV (peak-to-peak value) and nominal phase for NTSC unless otherwise specified. All voltages measured referenced to ground. SYMBOL VP I Ptot PARAMETER supply voltage supply current total power dissipation VP = 8.0 V without load VP = 8.0 V without load CONDITIONS MIN. 7.2 25 - TYP. 8.0 31 248 MAX. 8.8 37 296 V mA mW UNIT CD signal outputs (pins 1 and 3) PAL or NTSC V1 colour difference output signals -(R-Y) output PAL and NTSC 4.43 MHz (peak-to-peak value) NTSC 3.58 MHz (peak-to-peak value) V3 -(B-Y) output PAL and NTSC 4.43 MHz (peak-to-peak value) NTSC 3.58 MHz (peak-to-peak value) VPAL/VNTSC V1/V3 m fg td S/N V1, V3 signal ratio PAL/NTSC 3.58 MHz ratio of CD signal amplitudes V(R-Y) / V(B-Y) signal linearity -(R-Y) output signal linearity -(B-Y) output cut-off frequency (both outputs) chrominance delay time signal to noise ratio for nominal output voltages residual carrier at CD outputs: 1 x subcarrier frequency (peak-to-peak value) 2 x subcarrier frequency (peak-to-peak value) H/2 content at R-Y output at nominal input signal (peak-to-peak value) A R1, R3 I1, I3 SECAM V1 V3 V1/V3 m June 1993 colour difference output signals -(R-Y) output (peak-to-peak value) -(B-Y) output (peak-to-peak value) ratio of CD signal amplitudes V(R-Y)/(B-Y) signal linearity at nominal output voltage 7 independent of supply voltage; note 5 0.95 1.20 0.75 0.8 1.05 1.33 0.79 - 1.15 1.46 0.83 - V V - - crosstalk between CD Channels output resistance (npn emitter follower) output current note 4 note 3 note 2 note 2 V1 = 0.8 V (p-p) V3 = 1.0 V (p-p) -3 dB independent of supply voltage; note 1 442 370 559 468 0.5 0.75 0.8 0.8 - 220 40 - 525 440 665 557 1.5 0.79 - - 1 270 - - 624 523 791 662 2.5 0.83 - - - 320 - 10 mV mV mV mV dB - - - MHz ns dB mV - - -40 - - - - - - - 30 10 - 200 -3 mV mV dB mA Philips Semiconductors Preliminary specification Generic multi-standard decoder TDA4655 SYMBOL fg td S/N V1, V3 PARAMETER cut-off frequency chrominance delay time CONDITIONS -3 dB MIN. - 400 40 - TYP. 730 500 - - MAX. - 600 - 10 UNIT kHz ns dB mV signal to noise ratio for 100 mV (p-p) input note 3 signal and nominal output voltages residual carrier at CD outputs: 1 x subcarrier frequency (peak-to-peak value) 2 x subcarrier frequency (peak-to-peak value) - note 9 - - - 0 0 20 13 10 mV mV mV V3 V1 shift of demodulated f0 level relative to blanking level -(B-Y) output -(R-Y) output Impedance and currents see PAL or NTSC specification Capacitor for SECAM de-emphasis (pin 2) C2 RA RB (RA/RB) V1, 3 relative tolerance of de-emphasis resistors Capacitors for SECAM demodulator control (pins 4 and 10; note 6) shift of demodulated f0 level due to external leakage current Cext = 220 nF - - 0.3 mV/nA value of external capacitor value of internal de-emphasis resistors Tamb = +35 C - 2.4 4.8 - 220 2.8 5.6 - - 3.2 6.4 5 pF k k % Resistor for SECAM oscillator (pin 7) V7 R7 C7 V11 R11 C11 V1, 3 DC voltage value of external resistor (1%) value of external capacitor (20%) 2.4 - 2.81 5.62 10 3.2 - V k nF Chrominance input (pin 11) input signal (peak-to-peak value) input resistance input capacitance note 7 20 16 - - 200 20 - 400 24 10 - mV k pF Capacitor for ACC (pin 12; note 8) change of CD output signals during field blanking due to external leakage current Cext = 100 nF 0.2 %/nA Hue control (NTSC) and service switch (pin 13) phase shift of reference carrier relative to phase at open-circuit pin 13 V13 = 3 V V13 = open circuit V13 = 5 V V13 R13 internal bias voltage (proportional to supply voltage) input resistance pin 13 open circuit -30 -5 +30 3.8 25 - 0 - 4.0 30 - +5 - 4.2 35 V k June 1993 8 Philips Semiconductors Preliminary specification Generic multi-standard decoder TDA4655 SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Capacitor for identification (pins 14 and 15) V14, V15 DC voltage for an identified signal DC voltage for an unidentified signal PLL oscillator measured with nominal crystal (pins 16 and 18; see Table 1) R16, R17 C16, C17 fL initial oscillator amplifier input resistance oscillator amplifier input capacitance lock-in-range referenced to 4.43361875 MHz 3.579545 MHz phase difference for 400 Hz respectively 330 Hz deviation of colour carrier frequency note 10 400 330 - - - - 1300 Hz 1300 Hz 1 degree -500 - - - - 10 pF 2.8 1.5 3.2 2.0 3.5 2.3 V V 2 x fSC output (pin 19; if the output is not used, the pin should be connected to supply) V19 R19 I19 V19 DC output level output resistance output current output signal (peak-to-peak value) I19 = 0 A I19 = 0 A 6.1 - - - 6.3 - - 250 6.5 350 -1.0 - V mA mV Standard setting inputs/outputs (pins 20 to 23; note 11) used as output: npn emitter follower output with 0.1 mA source to ground VO RO IO VO IO C24 V24 on-state, during scanning, colour OFF on-state, colour ON output resistance output current threshold for system ON input current IO = 0 2.4 5.8 - - 6.8 100 - pulse ON pulse OFF pulse ON pulse OFF burst pulse separation pulse ON pulse OFF 1.3 1.1 3.3 3.1 5.3 5.1 2.5 6.0 - - 7.0 150 - 1.6 1.4 3.6 3.4 5.6 5.4 2.7 6.2 300 -3 7.2 180 V V mA V A used as input: forced system switching Sandcastle pulse detector (pin 24; note 12) input capacitance thresholds for field and line pulse separation line pulse separation 10 1.9 1.7 3.9 3.7 5.9 5.7 pF V V V V V V June 1993 9 Philips Semiconductors Preliminary specification Generic multi-standard decoder TDA4655 SYMBOL PARAMETER CONDITIONS MIN. TYP. - MAX. UNIT System control processing (note 13) td system hold delay in event of a signal disappearing for a short time 2 3 field periods field periods field periods field periods colour killer; colour ON delay colour OFF delay ts scanning time for each system switching occurs 2 during field blanking 0 - - - 4 3 1 - QUALITY SPECIFICATION URV-4-2-59/601 Notes to the characteristics 1. Burstkey width for PAL 4.3 s, for NTSC 3.6 s. Burst width for PAL and NTSC 2.25 s, ratio burst chrominance amplitude 1/2.2. 2. At nominal phase of hue control. 3. V (p-p) of signal divided by 6 times effective noise voltage. 4. At NTSC 3.58 35 mV (p-p). 5. H/2 blanking alternately every second line. 6. These pins are leakage current sensitive. Pin 4 for (B-Y) Channel, pin 10 for (R-Y) Channel. 7. Within 2 dB output voltage deviation. 8. This pin is leakage current sensitive. 9. IC only. 10. Depends also on network on pin 17. 11. Pin 23 for PAL, pin 22 for SECAM, pin 21 for NTSC 3.58 MHz, pin 20 for NTSC 4.43 MHz. Threshold levels are dependent on supply. 12. The field interval of the sandcastle has to be adapted to the ICs TDA2579B and TDA4690. The thresholds are independent of supply voltage. 13. System scanning sequence: PAL, SECAM, NTSC 3.5, NTSC 4.4. June 1993 10 Philips Semiconductors Preliminary specification Generic multi-standard decoder Table 1 Specification of quartz crystals in HC-49/U13 holder; standard application. PARAMETER nominal frequency load capacitance adjustment tolerance of fn at +25 C resonance resistance over temperature range in the drive level range between 10-12 W and 1.0 x 10-3 W, the resonance resistance may not exceed (at +25 C) the value of Rdld max resonance resistance of unwanted response motional capacitance (20%) parallel capacitance (20%) operating ambient temperature frequency tolerance over temperature 14.0 3.6 tbn 8.867570 VALUE 9922 520 00385 fn CL fn Rr Rdld max TDA4655 SYMBOL UNIT MHz ppm 9922 520 00387 7.159090 series resonance 20 60 tbn Rn C1 C0 Tamb fn 2Rr (+25C) 19.5 4.4 -10 to +60 20 fF pF C ppm June 1993 11 Philips Semiconductors Preliminary specification Generic multi-standard decoder TDA4655 June 1993 12 Fig.3 Internal circuits. Philips Semiconductors Preliminary specification Generic multi-standard decoder TDA4655 June 1993 13 Fig.4 Application circuit. Philips Semiconductors Preliminary specification Generic multi-standard decoder PACKAGE OUTLINES SDIP24: plastic shrink dual in-line package; 24 leads (400 mil) TDA4655 SOT234-1 D seating plane ME A2 A L A1 c Z e b 24 13 b1 wM (e 1) MH pin 1 index E 1 12 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 4.7 A1 min. 0.51 A2 max. 3.8 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 22.3 21.4 E (1) 9.1 8.7 e 1.778 e1 10.16 L 3.2 2.8 ME 10.7 10.2 MH 12.2 10.5 w 0.18 Z (1) max. 1.6 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT234-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-02-04 June 1993 14 Philips Semiconductors Preliminary specification Generic multi-standard decoder TDA4655 SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c y HE vMA Z 24 13 Q A2 A1 pin 1 index Lp L 1 e bp 12 wM detail X (A 3) A 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 15.6 15.2 0.61 0.60 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.9 0.4 0.012 0.096 0.004 0.089 0.019 0.013 0.014 0.009 0.043 0.043 0.055 0.016 0.039 0.035 0.004 0.016 8 0o o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT137-1 REFERENCES IEC 075E05 JEDEC MS-013AD EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-24 June 1993 15 Philips Semiconductors Preliminary specification Generic multi-standard decoder SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). SDIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. TDA4655 Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. June 1993 16 Philips Semiconductors Preliminary specification Generic multi-standard decoder DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values TDA4655 This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. June 1993 17 |
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